Samsung Electronics (005930 KS) executive expects HBM to comprise approximately 30% of DRAM chipmakers' total wafer capacity in 2027 vs around 20% currently

Executive guidance of this kind on wafer-mix shifts is a familiar feature of memory cycles, where suppliers have historically redirected DRAM capacity toward higher-margin products during periods of tight supply, and the stated trajectory for HBM's share of total wafer capacity is the mechanism by which conventional DRAM and commodity pricing get squeezed. The transmission runs through the commodity DRAM market: each point of wafer capacity moved to HBM, which consumes materially more die area per bit than standard DRAM, tightens the effective bit supply of legacy product, a dynamic that has tended to support spot and contract pricing for DDR and server memory even absent demand strength. The relevant peer set is the trio of HBM producers, and the watch item is whether the other two signal similar allocation, since a synchronized shift has historically been what converts a capacity narrative into a pricing event; a lone supplier's mix change mostly affects its own margin structure. The split worth drawing is between capacity share and bit output share: HBM's larger die size and lower yields mean a 30% wafer share implies a smaller share of bits, which is the number that matters for DRAM supply balances. Qualification rounds and customer allocations at the leading-edge HBM node, plus any commentary on conventional DRAM pricing in the next quarterly calls, are the natural follow-ons.