TSMC (2330 TT) has reportedly developed and verified the CMOS platform A16 with the rear power supply method, ET News reports

Process node milestones of this kind are the standard way foundries signal roadmap execution to customers and the market: a named platform moving from development into verification is a step on a sequence that has historically run from tape-out support, through risk production, to high-volume ramp, with yields rather than announcements determining the economics. Backside power delivery is the contested frontier in leading-edge logic; the relevant frame is competitive sequencing, since TSMC and its principal rival have publicly taken different approaches to when and how they introduce the technique, and each side's timing claims have been a recurring source of repricing in the semi-cap and foundry peer set. Verification of the platform matters mainly as a tell for customer engagement: in past node transitions, early design-win commentary and capacity bookings have been the observable follow-ons, well before revenue recognition. Worth noting the source is a trade press report rather than company disclosure, so confirmation at a scheduled technology symposium or earnings call is the usual next checkpoint. For the equity, episodes of this kind have tended to be absorbed as confirmation of execution rather than new information, with the stock's sensitivity concentrated in capex and margin guidance around the ramp rather than the milestone itself.